(1) Field of the Invention
The present invention relates to a field effect transistor made of high breakdown voltage nitride semiconductor having high frequency and the manufacturing method thereof.
(2) Description of the Related Art
Group-III nitride semiconductors such as GaN have advantageous properties such as large bandgap, large dielectric strength, and high saturated drift velocities of electrons, and are expected to be applied to high frequency and high output devices. Furthermore, in an AlGaN/GaN heterojunction, highly concentrated two-dimensional electron gas (2DEG) at approximately 1×1013 cm−2 is generated on a heterojunction interface due to spontaneous polarization and piezoelectric polarization. Electric devices such as a Field Effect Transistor (FET) and a Schottky Barrier Diode (SBD) made of the nitride semiconductors are actively developed using these properties.
In order to improve the properties of the Group-III nitride semiconductor device, it is necessary to reduce parasitic resistance components such as contact resistance and channel resistance in the semiconductor device. Among the parasitic resistance components, the resistance component in the channel layer may be reduced by miniaturization of the device and reduction of the sheet resistance, in such cases, it is assumed that resistance component caused by the ohmic contact will likely to be more significant. Furthermore, GaN tends to have a large contact resistance since the bandgap is large at 3.4 eV. For example, in a miniaturized FET having gate length of 0.1 μm, a source-gate distance and a gate-drain distance of 0.2 μm, and when the ohmic contact resistance is ρC=1×10−5 Ωcm2, the ohmic contact resistance takes 80% or more of the parasitic resistance component. Thus, the reduction of the contact resistance is essential for improving the properties of the device.
The following methods have been proposed for reducing the ohmic contact resistance in the Group-III nitride semiconductor devices. More specifically, a method for diffusing Si on the surface of AlGaN at a high temperature (see, for example, Patent reference 1: U.S. Pat. No. 6,933,181), a method for reducing the ohmic contact by using a low-resistance multi-layer film as a cap layer, where the low-resistance multi-layer film is formed by alternately laminating two semiconductor layers, each includes n-type impurities and have different directions of the piezoelectric polarization and the spontaneous polarization (see, for example, Patent reference 2: Japanese Unexamined Patent Application Publication No. 2005-26671) and a method using a cap layer made of InxAlyGa1−x−yN (0<x<1, 0<y<1) which reduces the barrier height on the interface of the cap layer and the electron supply layer (see, for example, Japanese Unexamined Patent Application Publication No. 2006-287212) have been proposed. With these methods, for example, a low-resistance field effect transistor with a super lattice structure, having ρC=1×10−5 Ωcm2, and 0.4 Ωmm of the source resistance is obtained.